PIC18F45K40-I/PT 8bit Microcontrollers MCU 32KB Flash 2KB RAM 256B EEPROM 10bit ADC2 5bit DAC
♠ Faʻamatalaga o oloa
| Uiga Oloa | Uiga Taua |
| Tufuga: | Microchip |
| Vaega o oloa: | 8-bit Microcontrollers - MCU |
| RoHS: | Fa'amatalaga |
| Fa'asologa: | PIC18(L)F4xK40 |
| Tulaga fa'apipi'i: | SMD/SMT |
| Paket/Mata: | TQFP-44 |
| Autu: | PIC18 |
| Tele o mea e manatua polokalame: | 32 kB |
| Fa'amatalaga Pasi Lautele: | 8 bit |
| I'uga o le ADC: | 10 bit |
| Maualuluga o le Uati Faatele: | 64 MHz |
| Numera o I/Os: | 36 I/O |
| Fa'amatalaga RAM Tele: | 2 kB |
| Sapalai Voltage - Min: | 2.3 V |
| Sapalai Malosi - Max: | 5.5 V |
| La'ititi ole Vevela ole Gaioiina: | - 40C |
| Maualuluga Fa'agaioiga Vevela: | + 85 C |
| Fa'ailoga: | AEC-Q100 |
| afifiina: | fata |
| Fa'ailoga: | Microchip Tekonolosi / Atmel |
| I'uga ole DAC: | 5 bit |
| Ituaiga RAM fa'amaumauga: | SRAM |
| Tele fa'amaumauga ROM: | 256 T.L.M |
| Ituaiga ROM fa'amaumauga: | EEPROM |
| Ituaiga Fa'amatalaga: | I2C, EUSART, SPI |
| Susū ma'ale'ale: | Ioe |
| Numera o alavai ADC: | 35 Alavai |
| Numera o Timers/Cocounters: | 4 Taimi |
| Fa'asologa Fa'asologa: | PIC18F2xK40 |
| Oloa: | MCU |
| Ituaiga oloa: | 8-bit Microcontrollers - MCU |
| Ituaiga Manatu Polokalama: | moli |
| Aofaiga o pusa falegaosimea: | 160 |
| Vaega laiti: | Microcontrollers - MCU |
| igoa Fefa'ataua'iga: | PIC |
| Watchdog Timers: | Watchdog Taimi |
| Unit mamafa: | 0.007055 oz |
♠ 28/40/44-Pin, Low-Power, High-Performance Microcontrollers with XLP Technology
O nei PIC18 (L) F26 / 45 / 46K40 microcontrollers o loʻo faʻaalia ai le Analog, Core Independent Peripherals ma Fesoʻotaʻiga Fesoʻotaʻiga, faʻatasi ma le eXtreme Low-Power (XLP) tekonolosi mo le tele o faʻamoemoega lautele ma faʻaoga maualalo. O nei masini 28 / 40 / 44-pin ua faʻapipiʻiina i le 10-bit ADC ma le Computation (ADCC) otometi Capacitive Voltage Divider (CVD) metotia mo le faʻalauteleina o le paʻi lagona, avetaʻavale, faʻamama, oversampling ma le faʻatinoina o faʻatusatusaga otometi. Latou te ofoina atu foi se seti o Core Independent Peripherals e pei ole Complementary Waveform Generator (CWG), Windowed Watchdog Timer (WWDT), Cyclic Redundancy Check (CRC)/Memory Scan, Zero-Cross Detect (ZCD) ma Peripheral Pin Select (PPS), e maua ai le faʻalauteleina o le mamanu fetuutuunai ma faʻaititia le tau o le faiga.
• C Compiler Optimized RISC Architecture
• Saosaoa o Galuega:
- DC - 64 MHz fa'aoga uati i luga ole VDD atoa
– 62.5 ns ta'amilosaga fa'atonuga la'ititi
• Polokalama 2-Level Interrupt Priority
• 31-Level Deep Meafaigaluega faaputuga
• Taimi 8-Bit e tolu (TMR2/4/6) fa'atasi ai ma Mea Fa'atapula'a Taimi (HLT)
• Fa Taimi 16-Bit (TMR0/1/3/5)
• Toe Fa'asalaina le Malosiaga maualalo (POR)
• Taimi Malosi (PWRT)
• Toe Seti Brown-out (BOR)
• Filifiliga BOR (LPBOR) Maualalo
• Taimi Mata'i Mata'i (WWDT):
- Watchdog Toe setiina i luga o le va umi tele pe puʻupuʻu i le va o faʻaaliga manino
– Filifiliga prescaler fesuisuiai
– Filifilia le tele o le faamalama fesuisuiai
- O punaoa uma e mafai ona faʻaogaina i masini poʻo polokalama
